G3 Upgrade for the 7600

I've replaced the original 604/132 processor of my 7600 with a G3 upgrade from Metabox, a LittleJoe 300 (300 MHz G3, 512K backside cache at half the processor clock). This series of cards are famous for their easy installation; but I had some trouble nonetheless... Read on for my solutions. I've also added other firmware tips & tricks here.

Problems with the display driver under OF

The 7x00/8x00/9x00 machines come with Apple's OF 1.0.5, which is buggy in many places. One problem is that the control display adapter used in the 7x00/8x00 machines is not initialized properly, resulting in very strange video timings. On some monitors, the timing will be such that the monitor refuses to display anything.

Fortunately, Alan Mimms, a former Apple employee, has published a fix. Here is the Forth code that needs to be added to your nvramrc:

        dev /bandit/gc/via-cuda
        ' write value &W
        : -&We &W swap - execute ;
        : P1 4D8 -&We false 548 -&We ;
        &W FC + ' P1 BLpatch
        : P2 0C 2 ms ;
        &W E0 + ' P2 BLpatch device-end

You can either add this under linux, using nvsetenv, or have a lok at Alan's mail for a way to encode it directly into OF.

I've added myself a few other fixes to OF, that I've taken from various sources. Grab my current nvramrc and my script to install it. You might want to compare the first few lines of my nvramrc with what you've got on your box before installing this. If anything goes wrong, you'll have to either reboot to MacOS (that will reset nvramrc), zap the PRAM, or, last resort, take out the battery to erase the wrong nvramrc.

A final warning: This is all only for Apple's OpenFirmware version 1.0.5! Don't use it on any other version of OF!

Booting from the internal SCSI bus

When I changed my internal SCSI disk, I suddenly couldn't boot from the new drive anymore. OF would loop through 'RESETing SCSI bus..'. A few conversations with Metabox support led to the bad implementation of a busy loop as the culprit.

Since that means the processor is running too fast, I looked for a way to slow it down. And I've found one.... The G3 processors implement a feature which is designed for power saving and temperature control. It works by slowing down the rate at which instructions are fetched from the instruction cache. This is achieved by writing a non-zero value to the ICTC special register in the G3 processor.

Since OF 1.0.5 doesn't have a word for accessing the ICTC register, I had to define one first. That done, I only had to slow down the processor a bit in order to make the internal SCSI bus accessible again. Here is the Forth code I added to my nvramrc:

	code ictc!
	        7e9bfba6 l, 829f0000 l, 3bff0004 l, 4e800020 l,

	[email protected] 80000 >=
	        [email protected] 208 or
	        FFFFFF7F and
	        11 ictc!

In addition to configuring ICTC, this code also disables speculative adressing, since the ROMs in the early PCI Mac's can't cope with it. At least that's what I heard... I'm re-enabling it later in Linux anyway.

Enabling the Level 2 Cache under Linux

If you have a PowerMac upgraded with a G3 processor card, i.e. the box did not originally have a G3 processor, you might want to check out these patches: They add a kernel command line option for enabling the L2 cache and fix the display of L2 properties (in /proc/sys/kernel/l2cr):

My command line looks like this:


WARNING! Don't just copy this; you need to use an l2cr value that's apropriate for your processor card! You can dammage your machine with wrong values! Most of the time, a wrong value will just hang your box. To get that value, boot into MacOS, make sure the Extension for your processor card loaded, and then boot into Linux (via BootX application, if posible). Once in linux, do:

[[email protected] ~/work]$ cat /proc/sys/kernel/l2cr
0xa9000000: enabled, no parity, 512KB, +2 clock, pipelined burst SRAM, copy-back, 0.5ns hold

The green part is your l2cr command line value.

Finally, there is also a way to do the l2cr enablng in user space, from the init scripts, via sysctl or /proc/sys/kernel/l2cr. Here's what I added to /etc/rc.d/rc.sysinit:

	action "Mounting proc filesystem" mount -n -t proc /proc /proc

	# Now that /proc is available, set up level2 cache:
	echo 0 > /proc/sys/kernel/l2cr
	echo '0x29200000' > /proc/sys/kernel/l2cr
	echo '0xa9200000' > /proc/sys/kernel/l2cr
	action "Enabling level2 cache" echo -n

WARNING! Don't just copy the values above! You have been warned. Note that to play it safe my values above contain a global invalidate.

Last modified: 20000924