diff -uNr linux-2.2.17-pristine/arch/ppc/kernel/ppc_htab.c linux/arch/ppc/kernel/ppc_htab.c --- linux-2.2.17-pristine/arch/ppc/kernel/ppc_htab.c Thu Sep 7 20:35:30 2000 +++ linux/arch/ppc/kernel/ppc_htab.c Tue Sep 12 22:43:03 2000 @@ -35,6 +35,8 @@ static long long ppc_htab_lseek(struct file * file, loff_t offset, int orig); int proc_dol2crvec(ctl_table *table, int write, struct file *filp, void *buffer, size_t *lenp); +int proc_doictcvec(ctl_table *table, int write, struct file *filp, + void *buffer, size_t *lenp); extern PTE *Hash, *Hash_end; extern unsigned long Hash_size, Hash_mask; @@ -530,7 +532,7 @@ void *buffer, size_t *lenp) { int vleft, first=1, len, left, val; - #define TMPBUFLEN 256 + #define TMPBUFLEN 512 char buf[TMPBUFLEN], *p; static const char *sizestrings[4] = { "unknown size", "256KB", "512KB", "1MB" @@ -596,20 +598,121 @@ if (!first) *p++ = '\t'; val = _get_L2CR(); - p += sprintf(p, "%08x: ", val); - p += sprintf(p, " %s", - (val&0x80000000)?"enabled":"disabled"); - p += sprintf(p,",%sparity",(val&0x40000000)?"":"no "); - p += sprintf(p, ",%s", sizestrings[(val >> 28) & 3]); - p += sprintf(p, ",%s", clockstrings[(val >> 25) & 7]); - p += sprintf(p, ",%s", typestrings[(val >> 23) & 0x2]); - p += sprintf(p,"%s",(val>>22)&1?"":",data only"); - p += sprintf(p,"%s",(val>>20)&1?",ZZ enabled":""); - p += sprintf(p,",%s",(val>>19)&1?"write-through":"copy-back"); - p += sprintf(p,",%sns hold", holdstrings[(val>>16)&3]); - - p += sprintf(p,"\n"); - + p += sprintf(p, "0x%08x: ", val); + p += sprintf(p, " %s", (val >> 31) & 1 ? "enabled" : + "disabled"); + p += sprintf(p, ", %sparity", (val>>30)&1 ? "" : "no "); + p += sprintf(p, ", %s", sizestrings[(val >> 28) & 3]); + p += sprintf(p, ", %s", clockstrings[(val >> 25) & 7]); + p += sprintf(p, ", %s", typestrings[(val >> 23) & 2]); + p += sprintf(p, "%s", (val>>22)&1 ? ", data only" : ""); + p += sprintf(p, "%s", (val>>20)&1 ? ", ZZ enabled": ""); + p += sprintf(p, ", %s", (val>>19)&1 ? "write-through" : + "copy-back"); + p += sprintf(p, "%s", (val>>18)&1 ? ", testing" : ""); + p += sprintf(p, ", %sns hold",holdstrings[(val>>16)&3]); + p += sprintf(p, "%s", (val>>15)&1 ? ", DLL slow" : ""); + p += sprintf(p, "%s", (val>>14)&1 ? ", diff clock" :""); + p += sprintf(p, "%s", (val>>13)&1 ? ", DLL bypass" :""); + + p += sprintf(p, "\n"); + + val = _get_HID0(); + p += sprintf(p, "HID0 contents: 0x%08x\n", val); + + len = strlen(buf); + if (len > left) + len = left; + if(copy_to_user(buffer, buf, len)) + return -EFAULT; + left -= len; + buffer += len; + break; + } + } + + if (!write && !first && left) { + if(put_user('\n', (char *) buffer)) + return -EFAULT; + left--, buffer++; + } + if (write) { + p = (char *) buffer; + while (left) { + char c; + if(get_user(c, p++)) + return -EFAULT; + if (!isspace(c)) + break; + left--; + } + } + if (write && first) + return -EINVAL; + *lenp -= left; + filp->f_pos += *lenp; + return 0; +} + +int proc_doictcvec(ctl_table *table, int write, struct file *filp, + void *buffer, size_t *lenp) +{ + int vleft, first=1, len, left, val; + #define TMPBUFLEN 128 + char buf[TMPBUFLEN], *p; + + if ( ((_get_PVR() >> 16) != 8) && ((_get_PVR() >> 16) != 12)) + return -EFAULT; + + if ( /*!table->maxlen ||*/ (filp->f_pos && !write)) { + *lenp = 0; + return 0; + } + + vleft = table->maxlen / sizeof(int); + left = *lenp; + + for (; left /*&& vleft--*/; first=0) { + if (write) { + while (left) { + char c; + if(get_user(c,(char *) buffer)) + return -EFAULT; + if (!isspace(c)) + break; + left--; + ((char *) buffer)++; + } + if (!left) + break; + len = left; + if (len > TMPBUFLEN-1) + len = TMPBUFLEN-1; + if(copy_from_user(buf, buffer, len)) + return -EFAULT; + buf[len] = 0; + p = buf; + if (*p < '0' || *p > '9') + break; + val = simple_strtoul(p, &p, 0); + len = p-buf; + if ((len < left) && *p && !isspace(*p)) + break; + buffer += len; + left -= len; + _set_ICTC(val); + + } else { + p = buf; + if (!first) + *p++ = '\t'; + val = _get_ICTC(); + p += sprintf(p, "Instruction Cache Throttling Control:\n\n"); + p += sprintf(p, "0x%08x: ", val); + p += sprintf(p, " %s", val & 1 ? "enabled" : + "disabled"); + p += sprintf(p, ", delay: %d clock cycles.\n", + (val >> 1) & 255 ); len = strlen(buf); if (len > left) len = left; diff -uNr linux-2.2.17-pristine/include/linux/sysctl.h linux/include/linux/sysctl.h --- linux-2.2.17-pristine/include/linux/sysctl.h Thu Sep 7 19:49:42 2000 +++ linux/include/linux/sysctl.h Tue Sep 12 20:36:06 2000 @@ -106,6 +106,7 @@ KERN_SYSRQ=38, /* int: Sysreq enable */ KERN_SHMALL=41, /* int: maximum size of shared memory */ KERN_SPARC_STOP_A=44, /* int: Sparc Stop-A enable */ + KERN_PPC_ICTC=45, /* ictc register on PPC */ }; diff -uNr linux-2.2.17-pristine/kernel/sysctl.c linux/kernel/sysctl.c --- linux-2.2.17-pristine/kernel/sysctl.c Thu Sep 7 19:49:43 2000 +++ linux/kernel/sysctl.c Tue Sep 12 20:37:08 2000 @@ -59,6 +59,8 @@ extern unsigned long htab_reclaim_on, zero_paged_on, powersave_nap; int proc_dol2crvec(ctl_table *table, int write, struct file *filp, void *buffer, size_t *lenp); +int proc_doictcvec(ctl_table *table, int write, struct file *filp, + void *buffer, size_t *lenp); #endif #ifdef CONFIG_BSD_PROCESS_ACCT @@ -199,6 +201,8 @@ 0644, NULL, &proc_dointvec}, {KERN_PPC_L2CR, "l2cr", NULL, 0, 0644, NULL, &proc_dol2crvec}, + {KERN_PPC_ICTC, "ictc", NULL, 0, + 0644, NULL, &proc_doictcvec}, #endif {KERN_CTLALTDEL, "ctrl-alt-del", &C_A_D, sizeof(int), 0644, NULL, &proc_dointvec}, --- linux-2.2.17-pristine/init/main.c Thu Sep 7 20:36:06 2000 +++ linux-2.2.17/init/main.c Fri Sep 29 23:45:09 2000 @@ -354,6 +354,9 @@ #ifdef CONFIG_ADBMOUSE extern void adb_mouse_setup(char *str, int *ints); #endif +#ifdef CONFIG_PPC +extern void ppc_setup_l2cr(char *str, int *ints); +#endif #ifdef CONFIG_WDT extern void wdt_setup(char *str, int *ints); #endif @@ -1051,6 +1054,9 @@ #endif #ifdef CONFIG_ADBMOUSE { "adb_buttons=", adb_mouse_setup }, +#endif +#ifdef CONFIG_PPC + { "l2cr=", ppc_setup_l2cr }, #endif #ifdef CONFIG_LTPC { "ltpc=", ltpc_setup }, diff -uNr linux-2.2.17-pristine/include/asm-ppc/system.h linux/include/asm-ppc/system.h --- linux-2.2.17-pristine/include/asm-ppc/system.h Thu Sep 7 20:35:49 2000 +++ linux/include/asm-ppc/system.h Thu Sep 7 22:47:07 2000 @@ -65,6 +65,9 @@ extern void hard_reset_now(void); extern void poweroff_now(void); extern int _get_PVR(void); +extern u32 _get_HID0(void); +extern u32 _get_ICTC(void); +extern void _set_ICTC(u32); extern long _get_L2CR(void); extern void _set_L2CR(unsigned long); extern void via_cuda_init(void); diff -uNr linux-2.2.17-pristine/arch/ppc/kernel/head.S linux/arch/ppc/kernel/head.S --- linux-2.2.17-pristine/arch/ppc/kernel/head.S Thu Sep 7 20:35:29 2000 +++ linux/arch/ppc/kernel/head.S Thu Sep 7 21:38:58 2000 @@ -1983,7 +1983,14 @@ 4: cror 14,14,18 bne 3,6f - ori r11,r11,HID0_SGE|HID0_BHTE|HID0_BTIC|HID0_ABE /* for g3/g4, enable */ + /* for G3/G4: + * enable Store Gathering (SGE), Address Brodcast (ABE), + * Branch History Table (BHTE), Branch Target ICache (BTIC) + */ + ori r11,r11,HID0_SGE | HID0_ABE | HID0_BHTE | HID0_BTIC + oris r11,r11,HID0_DPM>>16 /* enable dynamic power mgmt */ + li r3,HID0_SPD + andc r11,r11,r3 /* clear SPD: enable speculative */ li r3,0 mtspr ICTC,r3 5: mtspr HID0,r11 /* superscalar exec & br history tbl */ diff -uNr linux-2.2.17-pristine/include/asm-ppc/processor.h linux/include/asm-ppc/processor.h --- linux-2.2.17-pristine/include/asm-ppc/processor.h Thu Sep 7 20:35:49 2000 +++ linux/include/asm-ppc/processor.h Thu Sep 7 22:47:07 2000 @@ -41,10 +41,10 @@ #define HID0_EICE (1<<26) #define HID0_ECLK (1<<25) #define HID0_PAR (1<<24) -#define HID0_DOZE (1<<23) -#define HID0_NAP (1<<22) -#define HID0_SLEEP (1<<21) -#define HID0_DPM (1<<20) +#define HID0_DOZE (1<<23) /* DOZE mode enable */ +#define HID0_NAP (1<<22) /* NAP mode enable */ +#define HID0_SLEEP (1<<21) /* SLEEP mode enable */ +#define HID0_DPM (1<<20) /* Dynamic Power Management */ #define HID0_ICE (1<<15) /* Instruction Cache Enable */ #define HID0_DCE (1<<14) /* Data Cache Enable */ #define HID0_ILOCK (1<<13) /* Instruction Cache Lock */ @@ -52,9 +52,9 @@ #define HID0_ICFI (1<<11) /* Instruction Cache Flash Invalidate */ #define HID0_DCI (1<<10) /* Data Cache Invalidate */ #define HID0_SPD (1<<9) /* Speculative disable */ -#define HID0_SIED (1<<7) /* Serial Instruction Execution [Disable] */ +#define HID0_SIED (1<<7) /* Serial Instr. Execution [Disable] */ #define HID0_SGE (1<<7) /* Store Gathering Enable */ -#define HID0_BTIC (1<<5) /* Branch Target Instruction Cache Enable */ +#define HID0_BTIC (1<<5) /* Branch Target Instr. Cache Enable */ #define HID0_ABE (1<<3) /* Address Broadcast Enable */ #define HID0_BHTE (1<<2) /* Branch History Table Enable */ #define HID0_BTCD (1<<1) /* Branch target cache disable */ @@ -149,8 +149,7 @@ #define DEC 22 /* Decrementer */ #define EAR 282 /* External Address Register */ #define L2CR 1017 /* PPC 750 L2 control register */ - -#define ICTC 1019 +#define ICTC 1019 /* PPC 750 Instruction Cache Throttling Control */ #define THRM1 1020 #define THRM2 1021 #define THRM3 1022